| A Framework for Verification of Program Control Unit of VLIW processors | Santhosh Billava, Sharangdhar M Honwadkar | | | | | |
| A Framework for Verification of Program Control Unit of VLIW Processors | Santhosh Billava, Sharangdhar M Honwadkar | 2014 | Paper | | y2014 | paper |
| A Generic Configurable Error Injection Agent for All On-Chip Memories | Niharika Sachdeva, Arjun Suresh Kumar, Raviteja Gopagiri, Anil Deshpande, Somasunder Kattepura Sreenath, Damandeep Saini | 2022 | Presentation | | y2022 | presentation |
| A Generic Configurable Error Injection Agent for On-Chip Memories | Niharika Sachdeva, Arjun Suresh Kumar, Raviteja Gopagiri, Anil Deshpande, Somasunder Kattepura Sreenath | 2022 | Paper | | y2022 | paper |
| A Generic Verification Methodology for Chip to Chip Interrupt Handling in a Multi-Chip SoC (3DIC) | Vignesh Adiththan, Padma Vutukuru, Lalithraj Mailappa, Sekhar Dangudubiyyam | 2023 | Presentation | | y2023 | presentation |
| A Generic Verification Methodology for Chip to Chip Interrupt Handling in a Multi-Chip SoC (3DIC) | Vignesh Adiththan, Padma Vutukuru, Lalithraj Mailappa, Sekhar Dangudubiyyam | 2023 | Paper | | y2023 | paper |
| A Holistic Overview on Preventive & Corrective Action To Handle Glitches | Rohit Kumar Sinha, Parimal Das | 2022 | Poster | | y2022 | poster |
| A Hybrid Functional Verification Approach of complex designs using Python based Models | Nirmal Kumar, Joshi Pujaben Dishit, Vinay KH, Kuntal Pandya, Anil Deshpande | 2025 | Paper | | y2025 | paper |
| A New Epoch is Beginning: Are You Getting Ready for Stepping Into UVM-1.2? | Roman Wang,Uwe Simm | 2014 | Paper | | y2014 | paper |
| A New Epoch is Beginning: Are You Getting Ready for Stepping Into UVM-1.2? | Roman Wang, Uwe Simm | 2014 | Poster | | y2014 | poster |
| A Novel Approach to Hardware Controlled Power Aware Verification with Optimized Power Consumption Techniques at SOC | Eldin Ben Jacob, Harshal Kothari, Sriram Kazhiyur Soundarrajan, Somasunder Kattepura Sreenath | 2022 | Paper | | y2022 | paper |
